(1) Field of the Invention
The present invention relates to an error recovery system for use in a multiprocessor system, and in particular, to an error recovery system having storage control units with buffer storages in the multiprocessor system.
(2) Description of the Prior Art
The multiprocessor system comprises one or more main storage units for storing data including programs, a plurality of central processor units for processing the programs. Each of the central processor units comprises a plurality of execution processor units for executing the programs and a system control unit or storage control unit through which the execution processor units are coupled with the main storage unit. In order to reduce access times to the main storage unit, the storage control unit is provided with a buffer storage of a store-in type for storing, as buffer data, blocks of data read out from the main storage unit. The buffer storage is often called a cache memory.
Data required for executing programs at the execution processor units are read out from the buffer storage. When data required for the execution processor units are absent in the buffer storage, the storage control unit reads the required data from the main storage unit into the buffer storage. When the buffer storage has no vacant portion, the storage control unit transfers one or more data units from the buffer storage into the main storage unit to form a vacant portion prior to the reading operation from the main storage unit.
When a result of the program execution should be stored in the main storage unit so as to renew one or more units of the data, one or more units of the buffer data are only renewed into the result but data stored in the main storage unit are not renewed because the buffer storage is of the store-in type. Renewing for the main storage unit is carried out by the above-described data transfer from the buffer storage to the main storage unit.
Therefore, the buffer data in the buffer storage are usually different from the contents of the main storage unit.
In the multiprocessor system, the buffer data cannot be stored from the buffer storage into the main storage unit when an error or hardware failure occurs at any portion of the storage control unit. Therefore, even if the buffer data are normal, it is not possible to use the buffer data thereafter so that the system goes down.
U.S. Pat. No. 4,443,849 by Ohwada, assigned to Nippon Electric Co. Ltd. discloses an error recovery system for use in the multiprocessor system wherein, on occurrence of an error at a processor executing a program, status signals related to the program are transferred through a storage circuit in a diagnostic unit to another processor so that the other processor takes over execution of the program. This U.S. Patent also discloses transferring the status signals to the other processor through the main storage unit. The error recovery is called a processor relief technique. However, an error caused in the storage control unit cannot be recovered by the processor relief technique because the buffer data cannot be used in any one of the processors.